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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-01-16 16:02:34 +0000 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2025-01-17 10:43:57 +0000 |
| commit | 847343cfbf80bd221f42595a0038a8d5e7ab7088 (patch) | |
| tree | 89f50878826d18432b1b9fd3e0e258040de875e8 | |
| parent | d2f28a0ce8d2e09c0bc9c323b492d2ee70bbdc79 (diff) | |
| download | focaccia-qemu-847343cfbf80bd221f42595a0038a8d5e7ab7088.tar.gz focaccia-qemu-847343cfbf80bd221f42595a0038a8d5e7ab7088.zip | |
semihosting/arm-compat: Include missing 'cpu.h' header
ARM semihosting implementations in "common-semi-target.h"
must de-reference the target CPUArchState, which is declared
in each target "cpu.h" header. Include it in order to avoid
when refactoring:
In file included from ../../semihosting/arm-compat-semi.c:169:
../target/riscv/common-semi-target.h:16:5: error: use of undeclared identifier 'RISCVCPU'
16 | RISCVCPU *cpu = RISCV_CPU(cs);
| ^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250103171037.11265-4-philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20250116160306.1709518-6-alex.bennee@linaro.org>
| -rw-r--r-- | semihosting/arm-compat-semi.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index d78c6428b9..86e5260e50 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -166,6 +166,7 @@ static LayoutInfo common_semi_find_bases(CPUState *cs) #endif +#include "cpu.h" #include "common-semi-target.h" /* |