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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-01-15 07:16:33 -1000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-01-23 13:00:11 +0000 |
| commit | bb461330a1ca4d90c67054b493ed408fb7852d74 (patch) | |
| tree | 3922ae89c8b5e6eae9be69bb20584b3883429a47 | |
| parent | 65cc5ccf06a74c98de73ec683d9a543baa302a12 (diff) | |
| download | focaccia-qemu-bb461330a1ca4d90c67054b493ed408fb7852d74.tar.gz focaccia-qemu-bb461330a1ca4d90c67054b493ed408fb7852d74.zip | |
target/arm: Widen cnthctl_el2 to uint64_t
This is a 64-bit register on AArch64, even if the high 44 bits are RES0. Because this is defined as ARM_CP_STATE_BOTH, we are asserting that the cpreg field is 64-bits. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230115171633.3171890-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index bf2bce046d..1feb63b4d7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -479,7 +479,7 @@ typedef struct CPUArchState { }; uint64_t c14_cntfrq; /* Counter Frequency register */ uint64_t c14_cntkctl; /* Timer Control register */ - uint32_t cnthctl_el2; /* Counter/Timer Hyp Control register */ + uint64_t cnthctl_el2; /* Counter/Timer Hyp Control register */ uint64_t cntvoff_el2; /* Counter Virtual Offset register */ ARMGenericTimer c14_timer[NUM_GTIMERS]; uint32_t c15_cpar; /* XScale Coprocessor Access Register */ |