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| author | Nazar Kazakov <nazar.kazakov@codethink.co.uk> | 2023-05-01 21:17:22 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-02 13:05:45 -0700 |
| commit | bef317d0c36d66cb44d14a0838d5abe7b26b0344 (patch) | |
| tree | 4e5d746074d0d5fc04e0d9eaeece3c2d9ab7eeb7 | |
| parent | 4221aa4a882403fc7d6d22ad6af9a58c8a5badf6 (diff) | |
| download | focaccia-qemu-bef317d0c36d66cb44d14a0838d5abe7b26b0344.tar.gz focaccia-qemu-bef317d0c36d66cb44d14a0838d5abe7b26b0344.zip | |
tcg: Add tcg_gen_gvec_rotrs
Add tcg expander and helper functions for rotate right vector with scalar operand. Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Message-Id: <20230428144757.57530-10-lawrence.hunter@codethink.co.uk> [rth: Split out of larger patch; mask rotation count.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | include/tcg/tcg-op-gvec.h | 2 | ||||
| -rw-r--r-- | tcg/tcg-op-gvec.c | 11 |
2 files changed, 13 insertions, 0 deletions
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h index 6d58683171..a8183bfeab 100644 --- a/include/tcg/tcg-op-gvec.h +++ b/include/tcg/tcg-op-gvec.h @@ -371,6 +371,8 @@ void tcg_gen_gvec_sars(unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); /* * Perform vector shift by vector element, modulo the element size. diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index 9c14908a46..f51bcaa87b 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/tcg-op-gvec.c @@ -3353,6 +3353,17 @@ void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs, do_gvec_shifts(vece, dofs, aofs, shift, oprsz, maxsz, &g); } +void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i32 tmp = tcg_temp_ebb_new_i32(); + + tcg_gen_neg_i32(tmp, shift); + tcg_gen_andi_i32(tmp, tmp, (8 << vece) - 1); + tcg_gen_gvec_rotls(vece, dofs, aofs, tmp, oprsz, maxsz); + tcg_temp_free_i32(tmp); +} + /* * Expand D = A << (B % element bits) * |