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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-02 08:13:36 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-02 08:13:36 -0700 |
| commit | c9641eb422905cc0804a7e310269abf09543cce8 (patch) | |
| tree | 8dbd2d6c29eb9c2e9250394b7100abf3e3e0a81a | |
| parent | 1e62a82574fc28e64deca589a23cf55ada2e1a7d (diff) | |
| parent | 94bcc91b2e95e02ec57ed18d5a5e7cb75aa19a50 (diff) | |
| download | focaccia-qemu-c9641eb422905cc0804a7e310269abf09543cce8.tar.gz focaccia-qemu-c9641eb422905cc0804a7e310269abf09543cce8.zip | |
Merge tag 'pull-tcg-20220602' of https://gitlab.com/rth7680/qemu into staging
Add tcg_gen_mov_ptr. Fix tcg/i386 encoding of avx512 vpsraq. Fix tcg/aarch64 handling of out-of-range shli. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmKY0xodHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8nhwf+LTq5foaCunKI9yeQ # o78A1BbSFzSUd9hlzHt4MDWlDKsF+0WUKJ2kkgUTXNFUdTgpvQUKCaTuqHpt+LfQ # o8Gfbbd2eYixz/utkJ+PE3xUqNR5Wnh6XfuSFlk1ib4x2Wztr7+Mm+szoRcbIXR4 # 5pqZxGVQ9XVFPaIQ6cnb6IQe68ky/p9ejoG1SPiphlLt5/zY7Fqsicfn7NFePK5t # IxfcLjapCokLKP3AeioSf3l96sT1OWT6lQLeammEipMH0MuR/jTd3Ayx0nV0RwVz # FoSV+JP+CCyRu+C1yQ+ImkxMQhgBfu+T19CBIzimIEx8sn+8Nby+oi2CvNx8mBWj # Z3dQlg== # =sVH7 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 02 Jun 2022 08:11:22 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20220602' of https://gitlab.com/rth7680/qemu: tcg/aarch64: Fix illegal insn from out-of-range shli tcg/i386: Fix encoding of OPC_VPSRAQ for INDEX_op_sars_vec tcg: Add tcg_gen_mov_ptr Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | include/tcg/tcg-op.h | 5 | ||||
| -rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 2 | ||||
| -rw-r--r-- | tcg/i386/tcg-target.c.inc | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index b09b8b4a05..209e168305 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -1288,6 +1288,11 @@ static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b) glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b); } +static inline void tcg_gen_mov_ptr(TCGv_ptr d, TCGv_ptr s) +{ + glue(tcg_gen_mov_,PTR)((NAT)d, (NAT)s); +} + static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a, intptr_t b, TCGLabel *label) { diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 61e284bb5c..d997f7922a 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1261,7 +1261,7 @@ static inline void tcg_out_shl(TCGContext *s, TCGType ext, { int bits = ext ? 64 : 32; int max = bits - 1; - tcg_out_ubfm(s, ext, rd, rn, bits - (m & max), max - (m & max)); + tcg_out_ubfm(s, ext, rd, rn, (bits - m) & max, (max - m) & max); } static inline void tcg_out_shr(TCGContext *s, TCGType ext, diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index b5c6159853..d52206ba4d 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -375,7 +375,7 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) #define OPC_PSLLQ (0xf3 | P_EXT | P_DATA16) #define OPC_PSRAW (0xe1 | P_EXT | P_DATA16) #define OPC_PSRAD (0xe2 | P_EXT | P_DATA16) -#define OPC_VPSRAQ (0x72 | P_EXT | P_DATA16 | P_VEXW | P_EVEX) +#define OPC_VPSRAQ (0xe2 | P_EXT | P_DATA16 | P_VEXW | P_EVEX) #define OPC_PSRLW (0xd1 | P_EXT | P_DATA16) #define OPC_PSRLD (0xd2 | P_EXT | P_DATA16) #define OPC_PSRLQ (0xd3 | P_EXT | P_DATA16) |