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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-23 18:45:29 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-23 15:07:32 -0700 |
| commit | 9638cb59ee3d3a505f4bb6b9a4bcc49c3df4edcc (patch) | |
| tree | 4c59cf906eef5bb4797357055607043ac51b5bcf /accel/tcg/backend-ldst.h | |
| parent | 8201f1a29c95bca095bdd6e6c6eba42d8d06499b (diff) | |
| download | focaccia-qemu-9638cb59ee3d3a505f4bb6b9a4bcc49c3df4edcc.tar.gz focaccia-qemu-9638cb59ee3d3a505f4bb6b9a4bcc49c3df4edcc.zip | |
tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/backend-ldst.h')
| -rw-r--r-- | accel/tcg/backend-ldst.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/accel/tcg/backend-ldst.h b/accel/tcg/backend-ldst.h new file mode 100644 index 0000000000..9c3a407a5a --- /dev/null +++ b/accel/tcg/backend-ldst.h @@ -0,0 +1,41 @@ +/* + * Internal memory barrier helpers for QEMU (target agnostic) + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef ACCEL_TCG_BACKEND_LDST_H +#define ACCEL_TCG_BACKEND_LDST_H + +#include "tcg-target-mo.h" + +/** + * tcg_req_mo: + * @guest_mo: Guest default memory order + * @type: TCGBar + * + * Filter @type to the barrier that is required for the guest + * memory ordering vs the host memory ordering. A non-zero + * result indicates that some barrier is required. + */ +#define tcg_req_mo(guest_mo, type) \ + ((type) & guest_mo & ~TCG_TARGET_DEFAULT_MO) + +/** + * cpu_req_mo: + * @cpu: CPUState + * @type: TCGBar + * + * If tcg_req_mo indicates a barrier for @type is required + * for the guest memory model, issue a host memory barrier. + */ +#define cpu_req_mo(cpu, type) \ + do { \ + if (tcg_req_mo(cpu->cc->tcg_ops->guest_default_memory_order, type)) { \ + smp_mb(); \ + } \ + } while (0) + +#endif |