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| author | Gustavo Romero <gustavo.romero@linaro.org> | 2025-08-26 11:21:28 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-08-30 16:37:22 +0100 |
| commit | 8a60ffe9a8f46ed514656eb4a40d1386c439daf8 (patch) | |
| tree | 1996024bd522336c13fc8b89f0e95eac9e0032b5 /docs/system/arm/emulation.rst | |
| parent | 84249d026bc3878c196ecd3e8558609ba9260eb6 (diff) | |
| download | focaccia-qemu-8a60ffe9a8f46ed514656eb4a40d1386c439daf8.tar.gz focaccia-qemu-8a60ffe9a8f46ed514656eb4a40d1386c439daf8.zip | |
target/arm: Implement FEAT_SCTLR2 and enable with -cpu max
Add FEAT_SCTLR2, which introduces the SCTLR2_EL1, SCTLR2_EL2, and SCTLR2_EL3 registers. These registers are extensions of the SCTLR_ELx ones. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250727074202.83141-4-richard.henderson@linaro.org Message-ID: <20250711140828.1714666-4-gustavo.romero@linaro.org> [rth: Remove FEAT_MEC code; handle SCR and HCRX enable bits.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system/arm/emulation.rst')
| -rw-r--r-- | docs/system/arm/emulation.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 890dc6fee2..66043b0747 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -121,6 +121,7 @@ the following architecture extensions: - FEAT_RPRES (Increased precision of FRECPE and FRSQRTE) - FEAT_S2FWB (Stage 2 forced Write-Back) - FEAT_SB (Speculation Barrier) +- FEAT_SCTLR2 (Extension to SCTLR_ELx) - FEAT_SEL2 (Secure EL2) - FEAT_SHA1 (SHA1 instructions) - FEAT_SHA256 (SHA256 instructions) |