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| author | Vikram Garhwal <vikram.garhwal@amd.com> | 2023-06-14 17:03:37 -0700 |
|---|---|---|
| committer | Stefano Stabellini <stefano.stabellini@amd.com> | 2023-06-15 16:46:47 -0700 |
| commit | 733766cd37338ea08cb6c22c6e040d55b26f326c (patch) | |
| tree | e81698f37a2331f04aae195593199fedcde74f56 /docs/system/target-arm.rst | |
| parent | a4b4b40be86f69a994bf614edd49d8f1fb79422e (diff) | |
| download | focaccia-qemu-733766cd37338ea08cb6c22c6e040d55b26f326c.tar.gz focaccia-qemu-733766cd37338ea08cb6c22c6e040d55b26f326c.zip | |
hw/arm: introduce xenpvh machine
Add a new machine xenpvh which creates a IOREQ server to register/connect with
Xen Hypervisor.
Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a
TPM emulator and connects to swtpm running on host machine via chardev socket
and support TPM functionalities for a guest domain.
Extra command line for aarch64 xenpvh QEMU to connect to swtpm:
-chardev socket,id=chrtpm,path=/tmp/myvtpm2/swtpm-sock \
-tpmdev emulator,id=tpm0,chardev=chrtpm \
-machine tpm-base-addr=0x0c000000 \
swtpm implements a TPM software emulator(TPM 1.2 & TPM 2) built on libtpms and
provides access to TPM functionality over socket, chardev and CUSE interface.
Github repo: https://github.com/stefanberger/swtpm
Example for starting swtpm on host machine:
mkdir /tmp/vtpm2
swtpm socket --tpmstate dir=/tmp/vtpm2 \
--ctrl type=unixio,path=/tmp/vtpm2/swtpm-sock &
Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Diffstat (limited to 'docs/system/target-arm.rst')
| -rw-r--r-- | docs/system/target-arm.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index a12b6bca05..790ac1b8a2 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -107,6 +107,7 @@ undocumented; you can get a complete list by running arm/stm32 arm/virt arm/xlnx-versal-virt + arm/xenpvh Emulated CPU architecture support ================================= |