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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2025-02-24 16:08:26 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | beeb56a43e8b4568c4513371349487f349df8864 (patch) | |
| tree | 982459621e0f2e4eed83cd9cd6df42549ec59424 /docs | |
| parent | 66975d9cd73642ad4bb488c2e53d5b3c857e9ce8 (diff) | |
| download | focaccia-qemu-beeb56a43e8b4568c4513371349487f349df8864.tar.gz focaccia-qemu-beeb56a43e8b4568c4513371349487f349df8864.zip | |
docs/specs/riscv-iommu.rst: add HPM support info
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250224190826.1858473-12-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/specs/riscv-iommu.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/docs/specs/riscv-iommu.rst b/docs/specs/riscv-iommu.rst index b1538c9ead..000c7e1f57 100644 --- a/docs/specs/riscv-iommu.rst +++ b/docs/specs/riscv-iommu.rst @@ -82,6 +82,8 @@ Several options are available to control the capabilities of the device, namely: - "off" (Out-of-reset translation mode: 'on' for DMA disabled, 'off' for 'BARE' (passthrough)) - "s-stage": enable s-stage support - "g-stage": enable g-stage support +- "hpm-counters": number of hardware performance counters available. Maximum value is 31. + Default value is 31. Use 0 (zero) to disable HPM support riscv-iommu-sys device ---------------------- |