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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-18 14:31:42 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-18 14:31:42 +0000 |
| commit | 2dda43bacc79f8e283702614745cd700c637de64 (patch) | |
| tree | 091425c65ad18714e967d6376cada6a6a6ae9db6 /fpu/softfloat.c | |
| parent | 315b59344126beab85a62b53582794b14436a5a4 (diff) | |
| parent | 1ed27a17cd9d9ebec8963bc358d74060b1dd6127 (diff) | |
| download | focaccia-qemu-2dda43bacc79f8e283702614745cd700c637de64.tar.gz focaccia-qemu-2dda43bacc79f8e283702614745cd700c637de64.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140317' into staging
target-arm queue: * more A64 Neon instructions * fixes to reset CBAR values for A9 and A15 boards * fix accesses to PMCR register in -icount mode # gpg: Signature made Mon 17 Mar 2014 22:04:52 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140317: (30 commits) scripts/qemu-binfmt-conf.sh: Add AArch64 registration target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate) target-arm: A64: Implement FCVTXN target-arm: A64: Implement scalar saturating narrow ops target-arm: A64: Move handle_2misc_narrow function target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE softfloat: export squash_input_denormal functions target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder target-arm: A64: Implement FRINT* target-arm: A64: Implement SRI target-arm: A64: Add FRECPX (reciprocal exponent) target-arm: A64: List unsupported shift-imm opcodes target-arm: A64: Implement FCVTL target-arm: A64: Implement FCVTN target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions target-arm: A64: Implement SHLL, SHLL2 target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP target-arm: A64: Saturating and narrowing shift ops ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu/softfloat.c')
| -rw-r--r-- | fpu/softfloat.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/fpu/softfloat.c b/fpu/softfloat.c index fc0b179df4..5f02c16d8d 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -288,7 +288,7 @@ INLINE flag extractFloat32Sign( float32 a ) | If `a' is denormal and we are in flush-to-zero mode then set the | input-denormal exception and return zero. Otherwise just return the value. *----------------------------------------------------------------------------*/ -static float32 float32_squash_input_denormal(float32 a STATUS_PARAM) +float32 float32_squash_input_denormal(float32 a STATUS_PARAM) { if (STATUS(flush_inputs_to_zero)) { if (extractFloat32Exp(a) == 0 && extractFloat32Frac(a) != 0) { @@ -473,7 +473,7 @@ INLINE flag extractFloat64Sign( float64 a ) | If `a' is denormal and we are in flush-to-zero mode then set the | input-denormal exception and return zero. Otherwise just return the value. *----------------------------------------------------------------------------*/ -static float64 float64_squash_input_denormal(float64 a STATUS_PARAM) +float64 float64_squash_input_denormal(float64 a STATUS_PARAM) { if (STATUS(flush_inputs_to_zero)) { if (extractFloat64Exp(a) == 0 && extractFloat64Frac(a) != 0) { |