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| author | Salil Mehta <salil.mehta@huawei.com> | 2024-07-16 12:15:00 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-07-22 20:15:41 -0400 |
| commit | efdb43b831efa5e0c8da3d062a1a37325b4a7708 (patch) | |
| tree | 2d6152e7798f0428aa8e301aa786f6d147674522 /gdbstub/gdbstub.c | |
| parent | 549c9a9dcbc1592ea79496f7b3ab234f366adeba (diff) | |
| download | focaccia-qemu-efdb43b831efa5e0c8da3d062a1a37325b4a7708.tar.gz focaccia-qemu-efdb43b831efa5e0c8da3d062a1a37325b4a7708.zip | |
hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is IO port based and existing CPUs AML code assumes _CRS objects would evaluate to a system resource which describes IO Port address. But on ARM arch CPUs control device(\\_SB.PRES) register interface is memory-mapped hence _CRS object should evaluate to system resource which describes memory-mapped base address. Update build CPUs AML function to accept both IO/MEMORY region spaces and accordingly update the _CRS object. Co-developed-by: Keqian Zhu <zhukeqian1@huawei.com> Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Tested-by: Vishnu Pajjuri <vishnu@os.amperecomputing.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Xianglai Li <lixianglai@loongson.cn> Tested-by: Miguel Luis <miguel.luis@oracle.com> Reviewed-by: Shaoqin Huang <shahuang@redhat.com> Tested-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240716111502.202344-6-salil.mehta@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'gdbstub/gdbstub.c')
0 files changed, 0 insertions, 0 deletions