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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-05-14 14:28:30 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-06-05 17:23:09 +0100 |
| commit | afc8b7d32668547308bdd654a63cf5228936e0ba (patch) | |
| tree | 330f2faccb0e7b9d3e144badbaa5bd2db62c4e3f /hw/adc/stm32f2xx_adc.c | |
| parent | effa992f153f5e7ab97ab843b565690748c5b402 (diff) | |
| download | focaccia-qemu-afc8b7d32668547308bdd654a63cf5228936e0ba.tar.gz focaccia-qemu-afc8b7d32668547308bdd654a63cf5228936e0ba.zip | |
target/arm: Split helper_crypto_sha1_3reg
Rather than passing an opcode to a helper, fully decode the operation at translate time. Use clear_tail_16 to zap the balance of the SVE register with the AdvSIMD write. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/adc/stm32f2xx_adc.c')
0 files changed, 0 insertions, 0 deletions