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authorJan Kiszka <jan.kiszka@siemens.com>2011-02-03 22:54:11 +0100
committerAnthony Liguori <aliguori@us.ibm.com>2011-02-04 06:33:26 -0600
commit0280b571c1a153f8926612d8c8d7359242d596f5 (patch)
tree17ecae86aca385ebc79a209314ca61bc635f5456 /hw/apic.c
parent73eb4c04e9e8ea7f6eb83694cb0c43e38d882a7c (diff)
downloadfocaccia-qemu-0280b571c1a153f8926612d8c8d7359242d596f5.tar.gz
focaccia-qemu-0280b571c1a153f8926612d8c8d7359242d596f5.zip
ioapic: Implement EOI handling for level-triggered IRQs
Add the missing EOI broadcast from local APIC to the IOAPICs on
completion of level-triggered IRQs. This ensures that a still asserted
IRQ source properly re-triggers an APIC IRQ.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/apic.c')
-rw-r--r--hw/apic.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/apic.c b/hw/apic.c
index ff581f0787..2f8376a307 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -18,6 +18,7 @@
  */
 #include "hw.h"
 #include "apic.h"
+#include "ioapic.h"
 #include "qemu-timer.h"
 #include "host-utils.h"
 #include "sysbus.h"
@@ -57,7 +58,8 @@
 
 #define ESR_ILLEGAL_ADDRESS (1 << 7)
 
-#define APIC_SV_ENABLE (1 << 8)
+#define APIC_SV_DIRECTED_IO             (1<<12)
+#define APIC_SV_ENABLE                  (1<<8)
 
 #define MAX_APICS 255
 #define MAX_APIC_WORDS 8
@@ -420,8 +422,9 @@ static void apic_eoi(APICState *s)
     if (isrv < 0)
         return;
     reset_bit(s->isr, isrv);
-    /* XXX: send the EOI packet to the APIC bus to allow the I/O APIC to
-            set the remote IRR bit for level triggered interrupts. */
+    if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && get_bit(s->tmr, isrv)) {
+        ioapic_eoi_broadcast(isrv);
+    }
     apic_update_irq(s);
 }