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authorAndreas Färber <afaerber@suse.de>2012-10-10 14:10:07 +0200
committerAndreas Färber <afaerber@suse.de>2012-10-30 22:38:37 +0100
commit60671e583c2bfb09746f59268fdc7d88eaa24deb (patch)
tree8e90c7df32f115eb47410166ff4839db9dfcb1bf /hw/apic_common.c
parent449994eb58a4175a2e7656175b18c65ead6c09ca (diff)
downloadfocaccia-qemu-60671e583c2bfb09746f59268fdc7d88eaa24deb.tar.gz
focaccia-qemu-60671e583c2bfb09746f59268fdc7d88eaa24deb.zip
apic: Store X86CPU in APICCommonState
Prepares for using a link<> property to connect APIC with CPU and for
changing the CPU APIs to CPUState.

Resolve Coding Style warnings by moving the closing parenthesis of
foreach_apic() macro to next line.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Diffstat (limited to 'hw/apic_common.c')
-rw-r--r--hw/apic_common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/apic_common.c b/hw/apic_common.c
index b13f23c991..5f542764eb 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -103,7 +103,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
 {
     APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
 
-    vapic_report_tpr_access(s->vapic, s->cpu_env, ip, access);
+    vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access);
 }
 
 void apic_report_irq_delivered(int delivered)
@@ -217,7 +217,7 @@ static void apic_reset_common(DeviceState *d)
     APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
     bool bsp;
 
-    bsp = cpu_is_bsp(x86_env_get_cpu(s->cpu_env));
+    bsp = cpu_is_bsp(s->cpu);
     s->apicbase = 0xfee00000 |
         (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;