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authorInès Varhol <ines.varhol@telecom-paris.fr>2024-10-14 17:05:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-10-15 11:29:45 +0100
commitb91b8fe79d093543b05db771b1e4a13395d51cfb (patch)
treec79d97fb8e429afb2af7e62c4eaa79fd9d553620 /hw/arm/stm32l4x5_soc.c
parent3db74afec3ca87f81fbdf5918ed1e21d837fbfab (diff)
downloadfocaccia-qemu-b91b8fe79d093543b05db771b1e4a13395d51cfb.tar.gz
focaccia-qemu-b91b8fe79d093543b05db771b1e4a13395d51cfb.zip
hw/misc: Create STM32L4x5 SYSCFG clock
This commit creates a clock in STM32L4x5 SYSCFG and wires it up to the
corresponding clock from STM32L4x5 RCC.

Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20241003081105.40836-2-ines.varhol@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/stm32l4x5_soc.c')
-rw-r--r--hw/arm/stm32l4x5_soc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
index fac83d349c..16e3505dcb 100644
--- a/hw/arm/stm32l4x5_soc.c
+++ b/hw/arm/stm32l4x5_soc.c
@@ -236,6 +236,8 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
 
     /* System configuration controller */
     busdev = SYS_BUS_DEVICE(&s->syscfg);
+    qdev_connect_clock_in(DEVICE(&s->syscfg), "clk",
+        qdev_get_clock_out(DEVICE(&(s->rcc)), "syscfg-out"));
     if (!sysbus_realize(busdev, errp)) {
         return;
     }