diff options
| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2021-03-08 23:46:36 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-12 12:40:09 +0000 |
| commit | 9f61763574fb19525a68c46f3b8f763e5936a6fe (patch) | |
| tree | 0465fcd543f6de9b77c45baf86cdb4184ee287be /hw/arm/xlnx-versal.c | |
| parent | 6f34661b6c97a37a5efc27d31c037ddeda4547e2 (diff) | |
| download | focaccia-qemu-9f61763574fb19525a68c46f3b8f763e5936a6fe.tar.gz focaccia-qemu-9f61763574fb19525a68c46f3b8f763e5936a6fe.zip | |
hw/misc: versal: Add a model of the XRAM controller
Add a model of the Xilinx Versal Accelerator RAM (XRAM). This is mainly a stub to make firmware happy. The size of the RAMs can be probed. The interrupt mask logic is modelled but none of the interrups will ever be raised unless injected. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20210308224637.2949533-2-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xlnx-versal.c')
0 files changed, 0 insertions, 0 deletions