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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-10-09 14:48:37 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-10-12 13:23:14 +0100 |
| commit | 5b8d7289e9e92a0d7bcecb93cd189e245fef10cd (patch) | |
| tree | ce5d0e090280463843614016f6d1fd36619930ce /hw/core/loader.c | |
| parent | 296e5a0a6c393553079a641c50521ae33ff89324 (diff) | |
| download | focaccia-qemu-5b8d7289e9e92a0d7bcecb93cd189e245fef10cd.tar.gz focaccia-qemu-5b8d7289e9e92a0d7bcecb93cd189e245fef10cd.zip | |
target-arm: Simplify insn_crosses_page()
Recent changes have left insn_crosses_page() more complicated than it needed to be: * it's only called from thumb_tr_translate_insn() so we know for certain that we're looking at a Thumb insn * the caller's check for dc->pc >= dc->next_page_start - 3 means that dc->pc can't possibly be 4 aligned, so there's no need to check that (the check was partly there to ensure that we didn't treat an ARM insn as Thumb, I think) * we now have thumb_insn_is_16bit() which lets us do a precise check of the length of the next insn, rather than opencoding an inaccurate check Simplify it down to just loading the first half of the insn and calling thumb_insn_is_16bit() on it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1507556919-24992-8-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/core/loader.c')
0 files changed, 0 insertions, 0 deletions