diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2015-06-15 18:43:09 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-06-15 18:43:09 +0100 |
| commit | 1dfe73b94de5a75038a725b17dc7d08a23a977ec (patch) | |
| tree | ea5f984fa10dd8b4f22339fa13ff9bb818d0f18f /hw/display | |
| parent | b500e4db8e3e0b5f41a2dd14e2001200e5fc7d6b (diff) | |
| parent | f264d51d8ad939d7fb339d61a8cf680ed0cb21a2 (diff) | |
| download | focaccia-qemu-1dfe73b94de5a75038a725b17dc7d08a23a977ec.tar.gz focaccia-qemu-1dfe73b94de5a75038a725b17dc7d08a23a977ec.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150615' into staging
target-arm queue: * Handle "extended small page" descriptors correctly * Use extended address bits from supersection short descriptors * Update interrupt status for all cores in gic_update * Fix off-by-one in exynos4210_fimd bit-swap code * Remove stray unused 'pending_exception' field * Add Cortex-A53 KVM support * Fix reset value of REVIDR * Add AArch32 MIDR aliases for ARMv8 cores * MAINTAINERS update for ARM ACPI code * Trust the kernel's value of MPIDR if we're using KVM * Various pxa2xx device updates to avoid old APIs * Mark pxa2xx copro registers as ARM_CP_IO so -icount works * Correctly UNDEF Thumb2 DSP insns on Cortex-M3 * Initial work towards implementing PMSAv7 * Fix a reset order bug introduced recently * Correct "preferred return address" for cpreg access exceptions * Add ACPI SPCR table for the virt board # gpg: Signature made Mon Jun 15 18:19:34 2015 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20150615: (28 commits) hw/arm/virt-acpi-build: Add SPCR table ACPI: Add definitions for the SPCR table target-arm: Correct "preferred return address" for cpreg access exceptions hw/arm/boot: fix rom_reset notifier registration order arm: helper: rename get_phys_addr_mpu arm: Add has-mpu property arm: Implement uniprocessor with MP config arm: Refactor get_phys_addr FSR return mechanism arm: helper: Factor out CP regs common to [pv]msa arm: Don't add v7mp registers in MPU systems arm: Do not define TLBTR in PMSA systems target-arm: Add the THUMB_DSP feature hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOps hw/arm/pxa2xx: Convert pxa2xx-ssp to VMState hw/arm/pxa2xx: Add reset method for pxa2xx_ssp hw/arm/pxa2xx: Convert pxa2xx-fir to QOM and VMState hw/arm/pxa2xx: Mark coprocessor registers as ARM_CP_IO target-arm: Use the kernel's idea of MPIDR if we're using KVM MAINTAINERS: Add myself as ARM ACPI Subsystem maintainer target-arm: add AArch32 MIDR aliases in ARMv8 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/display')
| -rw-r--r-- | hw/display/exynos4210_fimd.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index 72b3a1d063..603ef50568 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -337,7 +337,7 @@ static inline void fimd_swap_data(unsigned int swap_ctl, uint64_t *data) if (swap_ctl & FIMD_WINCON_SWAP_BITS) { res = 0; for (i = 0; i < 64; i++) { - if (x & (1ULL << (64 - i))) { + if (x & (1ULL << (63 - i))) { res |= (1ULL << i); } } |