diff options
| author | Zenghui Yu <zenghui.yu@linux.dev> | 2025-07-30 00:16:49 +0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-08-01 16:48:50 +0100 |
| commit | a0555e36fc44ea98edf7c50924de8b973cd4267d (patch) | |
| tree | 8518219e8dc92bfd14761439c5a1f118e500b7b2 /hw/display | |
| parent | cd9f752fee75238f842a91be1146c988bd16a010 (diff) | |
| download | focaccia-qemu-a0555e36fc44ea98edf7c50924de8b973cd4267d.tar.gz focaccia-qemu-a0555e36fc44ea98edf7c50924de8b973cd4267d.zip | |
hw/intc/arm_gicv3_kvm: Remove writes to ICPENDR registers
As per the arm-vgic-v3 kernel doc [1]:
Accesses to GICD_ICPENDR register region and GICR_ICPENDR0 registers
have RAZ/WI semantics, meaning that reads always return 0 and writes
are always ignored.
The state behind these registers (both 0 and 1 bits) is written by
writing to the GICD_ISPENDR and GICR_ISPENDR0 registers, unlike
some of the other set/clear register pairs.
Remove the useless writes to ICPENDR registers in kvm_arm_gicv3_put().
[1] https://docs.kernel.org/virt/kvm/devices/arm-vgic-v3.html
Signed-off-by: Zenghui Yu <zenghui.yu@linux.dev>
Message-id: 20250729161650.43758-2-zenghui.yu@linux.dev
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/display')
0 files changed, 0 insertions, 0 deletions