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authorJamin Lin <jamin_lin@aspeedtech.com>2024-07-18 14:49:12 +0800
committerCédric Le Goater <clg@redhat.com>2024-07-21 07:46:38 +0200
commit11bea810f7c1215e36824ed291a64e8f4e6f28df (patch)
treef30bc59dd336e55f346748f467aa5b457e7a8f3c /hw/i2c
parent13b5ae94ed4d03d4992af867d0edb075651a4da9 (diff)
downloadfocaccia-qemu-11bea810f7c1215e36824ed291a64e8f4e6f28df.tar.gz
focaccia-qemu-11bea810f7c1215e36824ed291a64e8f4e6f28df.zip
aspeed/soc: support ADC for AST2700
Add ADC model for AST2700 ADC support.
The ADC controller registers base address is start at
0x14C0_0000 and its address space is 0x1000.
The ADC controller interrupt is connected to
GICINT130_INTC group at bit 16. The GIC IRQ is 130.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
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