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| author | Bui Quang Minh <minhquangbui99@gmail.com> | 2024-01-11 22:44:00 +0700 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-02-14 06:09:32 -0500 |
| commit | 774204cf9874e58dc7fc13394a505452357750ad (patch) | |
| tree | 0769e519412bc9f51a56669011770eb415bb433d /hw/i386/xen/xen_apic.c | |
| parent | b5ee0468e9d28c6bd47cce70f90b5032dd10ecc2 (diff) | |
| download | focaccia-qemu-774204cf9874e58dc7fc13394a505452357750ad.tar.gz focaccia-qemu-774204cf9874e58dc7fc13394a505452357750ad.zip | |
apic, i386/tcg: add x2apic transitions
This commit adds support for x2APIC transitions when writing to MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to TCG_EXT_FEATURES. The set_base in APICCommonClass now returns an integer to indicate error in execution. apic_set_base return -1 on invalid APIC state transition, accelerator can use this to raise appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/xen/xen_apic.c')
| -rw-r--r-- | hw/i386/xen/xen_apic.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/i386/xen/xen_apic.c b/hw/i386/xen/xen_apic.c index 7c7a60b166..101e16a766 100644 --- a/hw/i386/xen/xen_apic.c +++ b/hw/i386/xen/xen_apic.c @@ -49,8 +49,9 @@ static void xen_apic_realize(DeviceState *dev, Error **errp) msi_nonbroken = true; } -static void xen_apic_set_base(APICCommonState *s, uint64_t val) +static int xen_apic_set_base(APICCommonState *s, uint64_t val) { + return 0; } static void xen_apic_set_tpr(APICCommonState *s, uint8_t val) |