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authorPeter Maydell <peter.maydell@linaro.org>2018-01-22 12:22:59 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-01-22 12:22:59 +0000
commitee264eb32c14f076c964fc34ee66f6f95cce2080 (patch)
treea138f710e4a4c40743ceb78e4b74747c25851756 /hw/ide
parent6df555170437e28fe89aa11f3b0613026c41d1f9 (diff)
parent1f63ebaa91f73f469c8f107dbd266cabdbea3a40 (diff)
downloadfocaccia-qemu-ee264eb32c14f076c964fc34ee66f6f95cce2080.tar.gz
focaccia-qemu-ee264eb32c14f076c964fc34ee66f6f95cce2080.zip
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.12-20180121' into staging
ppc patch queue 2018-01-21

This request supersedes the one from 2018-01-19.  The only difference
is that the patch deprecating ppcemb-softmmu, and thereby creating
many annying warnings from make check has been removed.

Highlights are:
  * Significant TCG speedup by optimizing cmp generation
  * Fix a regression caused by recent change to set compat mode on
    hotplugged cpus
  * Cleanup of default configs
  * Some implementation of msgsnd/msgrcv instructions for server chips

# gpg: Signature made Sun 21 Jan 2018 05:30:54 GMT
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.12-20180121:
  target/ppc/spapr_caps: Add macro to generate spapr_caps migration vmstate
  target/ppc: add support for hypervisor doorbells on book3s CPUs
  sii3112: Add explicit type casts to avoid unintended sign extension
  sm501: Add missing break to case
  target-ppc: optimize cmp translation
  spapr: fix device tree properties when using compatibility mode
  spapr: drop duplicate variable in spapr_core_plug()
  target/ppc: msgsnd and msgclr instructions need hypervisor privilege
  target/ppc: fix doorbell and hypervisor doorbell definitions
  hw/ppc/Makefile: Add a way to disable the PPC4xx boards
  default-configs/ppc-softmmu: Restructure the switches according to the machines
  default-configs/ppc64-softmmu: Include 32-bit configs instead of copying them

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ide')
-rw-r--r--hw/ide/sii3112.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
index e2f5562bb7..17aa930e39 100644
--- a/hw/ide/sii3112.c
+++ b/hw/ide/sii3112.c
@@ -79,13 +79,13 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
         val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/
         val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/
         val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0);
-        val |= d->i.bmdma[0].status << 16;
-        val |= d->i.bmdma[1].status << 24;
+        val |= (uint32_t)d->i.bmdma[0].status << 16;
+        val |= (uint32_t)d->i.bmdma[1].status << 24;
         break;
     case 0x18:
         val = d->i.bmdma[1].cmd;
         val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0);
-        val |= d->i.bmdma[1].status << 16;
+        val |= (uint32_t)d->i.bmdma[1].status << 16;
         break;
     case 0x80 ... 0x87:
         if (size == 1) {
@@ -128,7 +128,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
         val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0;
         break;
     case 0x148:
-        val = d->regs[0].sien << 16;
+        val = (uint32_t)d->regs[0].sien << 16;
         break;
     case 0x180:
         val = d->regs[1].scontrol;
@@ -137,7 +137,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
         val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0;
         break;
     case 0x1c8:
-        val = d->regs[1].sien << 16;
+        val = (uint32_t)d->regs[1].sien << 16;
         break;
     default:
         val = 0;