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authorPeter Maydell <peter.maydell@linaro.org>2023-01-30 18:24:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-02-03 12:59:22 +0000
commit049edada5e93df096c66a059e1171942238fc472 (patch)
tree11a621353ace2eb16159edf2652b232477fb0d91 /hw/intc/apic.c
parentcccc104bbfc02c741d4535be0184a6425399345d (diff)
downloadfocaccia-qemu-049edada5e93df096c66a059e1171942238fc472.tar.gz
focaccia-qemu-049edada5e93df096c66a059e1171942238fc472.zip
target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1
The semantics of HSTR_EL2 require that it traps cpreg accesses
to EL2 for:
 * EL1 accesses
 * EL0 accesses, if the access is not UNDEFINED when the
   trap bit is 0

(You can see this in the I_ZFGJP priority ordering, where HSTR_EL2
traps from EL1 to EL2 are priority 12, UNDEFs are priority 13, and
HSTR_EL2 traps from EL0 are priority 15.)

However, we don't get this right for EL1 accesses which UNDEF because
the register doesn't exist at all or because its ri->access bits
non-configurably forbid the access.  At EL1, check for the HSTR_EL2
trap early, before either of these UNDEF reasons.

We have to retain the HSTR_EL2 check in access_check_cp_reg(),
because at EL0 any kind of UNDEF-to-EL1 (including "no such
register", "bad ri->access" and "ri->accessfn returns 'trap to EL1'")
takes precedence over the trap to EL2.  But we only need to do that
check for EL0 now.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230130182459.3309057-7-peter.maydell@linaro.org
Message-id: 20230127175507.2895013-7-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/apic.c')
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