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| author | Tom Musta <tommusta@gmail.com> | 2014-11-14 14:01:41 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-11-20 14:52:01 +0100 |
| commit | 76cb6584196b6f35d6e9b5124974d3eba643f772 (patch) | |
| tree | bc4f474c4ced32b5fedb6d8ca18bac3db763505f /hw/intc/apic.c | |
| parent | f2a64032a14c642d0ddc9a7a846fc3d737deede5 (diff) | |
| download | focaccia-qemu-76cb6584196b6f35d6e9b5124974d3eba643f772.tar.gz focaccia-qemu-76cb6584196b6f35d6e9b5124974d3eba643f772.zip | |
target-ppc: Altivec's mtvscr Decodes Wrong Register
The Move to Vector Status and Control Register (mtvscr) instruction uses VRB as the source register. Fix the code generator to correctly decode the VRB field. That is, use "rB(ctx->opcode)" instead of "rD(ctx->opcode)". Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/intc/apic.c')
0 files changed, 0 insertions, 0 deletions