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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:21 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:21 +0100 |
| commit | 7556edfb4d7bf0583c852c8cfc49ef494c41dd8a (patch) | |
| tree | 09d32f987bb899b48df40d599dc7300477f08ad1 /hw/intc/arm_gicv3_cpuif.c | |
| parent | 30ac6339dca3fe0d05a611f12eedd5af20af585a (diff) | |
| download | focaccia-qemu-7556edfb4d7bf0583c852c8cfc49ef494c41dd8a.tar.gz focaccia-qemu-7556edfb4d7bf0583c852c8cfc49ef494c41dd8a.zip | |
target/arm: Honour HCR_EL2.TGE when raising synchronous exceptions
Whene we raise a synchronous exception, if HCR_EL2.TGE is set then exceptions targeting NS EL1 must be redirected to EL2. Implement this in raise_exception() -- all synchronous exceptions go through this function. (Asynchronous exceptions go via arm_cpu_exec_interrupt(), which already honours HCR_EL2.TGE when it determines the target EL in arm_phys_excp_target_el().) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180724115950.17316-4-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/arm_gicv3_cpuif.c')
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