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| author | Peter Maydell <peter.maydell@linaro.org> | 2025-01-30 18:22:58 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-20 14:20:28 +0000 |
| commit | ccda792945d650bce4609c8dbce8814a220df1bb (patch) | |
| tree | b1fe6cc4acc375418801024f298dc88d19c4a8d9 /hw/intc/arm_gicv3_cpuif.c | |
| parent | 1960d9701ef7ed8d24e98def767bbf05d63e6992 (diff) | |
| download | focaccia-qemu-ccda792945d650bce4609c8dbce8814a220df1bb.tar.gz focaccia-qemu-ccda792945d650bce4609c8dbce8814a220df1bb.zip | |
target/arm: Report correct syndrome for UNDEFINED S1E2 AT ops at EL3
The pseudocode for AT S1E2R and AT S1E2W says that they should be
UNDEFINED if executed at EL3 when EL2 is not enabled. We were
incorrectly using CP_ACCESS_TRAP and reporting the wrong exception
syndrome as a result. Use CP_ACCESS_TRAP_UNCATEGORIZED.
Cc: qemu-stable@nongnu.org
Fixes: 2a47df953202e1 ("target-arm: Wire up AArch64 EL2 and EL3 address translation ops")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250130182309.717346-4-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/arm_gicv3_cpuif.c')
0 files changed, 0 insertions, 0 deletions