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| author | Stafford Horne <shorne@gmail.com> | 2023-02-14 18:41:29 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2023-05-11 15:40:03 +0100 |
| commit | 9156ca76cb39ff1d72e701dec4a907f73592d88f (patch) | |
| tree | 362e0706457c8c89dc34ddb96d644b5808d1b2e1 /hw/intc/loongarch_ipi.c | |
| parent | 08f021de3af599b8ca4c745f324a3559dc2990d3 (diff) | |
| download | focaccia-qemu-9156ca76cb39ff1d72e701dec4a907f73592d88f.tar.gz focaccia-qemu-9156ca76cb39ff1d72e701dec4a907f73592d88f.zip | |
target/openrisc: Set PC to cpu state on FPU exception
Store the PC to ensure the correct value can be read in the exception handler. Signed-off-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/intc/loongarch_ipi.c')
0 files changed, 0 insertions, 0 deletions