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| author | Jinjie Ruan <ruanjinjie@huawei.com> | 2024-04-19 14:33:00 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-25 10:21:05 +0100 |
| commit | 34d94b7af9f1dc4cae550ecc7b825c9567741a12 (patch) | |
| tree | a8bd90f20c96e361383cf40d7e6b85e858a85bb2 /hw/intc/m68k_irqc.c | |
| parent | 83f320753827da6bd381b46b8f3e6736046c86cd (diff) | |
| download | focaccia-qemu-34d94b7af9f1dc4cae550ecc7b825c9567741a12.tar.gz focaccia-qemu-34d94b7af9f1dc4cae550ecc7b825c9567741a12.zip | |
hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU
Wire the new NMI and VINMI interrupt line from the GIC to each CPU if it is not GICv2. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240407081733.3231820-12-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/m68k_irqc.c')
0 files changed, 0 insertions, 0 deletions