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| author | Glenn Miles <milesg@linux.vnet.ibm.com> | 2024-09-13 11:16:52 -0500 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-11-04 09:14:37 +1000 |
| commit | cfe9a7f286f8db4316a25ac4471d91db8b387262 (patch) | |
| tree | f434d12fa4dd5ae255ed29ee9ecff13f468e2eee /hw/intc/xive.c | |
| parent | 76798e12dfa61ff7d7bc05a6cc831c023a8ba08c (diff) | |
| download | focaccia-qemu-cfe9a7f286f8db4316a25ac4471d91db8b387262.tar.gz focaccia-qemu-cfe9a7f286f8db4316a25ac4471d91db8b387262.zip | |
ppc/xive2: Allow 1-byte write of Target field in TIMA
When running PowerVM, the console is littered with XIVE traces regarding invalid writes to TIMA address 0x100b6 due to a lack of support for writes to the "TARGET" field which was added for XIVE GEN2. To fix this, we add special op support for 1-byte writes to this field. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw/intc/xive.c')
| -rw-r--r-- | hw/intc/xive.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/intc/xive.c b/hw/intc/xive.c index caa8dc74b6..574ac685c3 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -546,6 +546,8 @@ static const XiveTmOp xive2_tm_operations[] = { NULL }, { XIVE_TM_HV_PAGE, TM_QW3_HV_PHYS + TM_WORD2, 1, NULL, xive_tm_vt_poll }, + { XIVE_TM_HV_PAGE, TM_QW3_HV_PHYS + TM_T, 1, xive2_tm_set_hv_target, + NULL }, /* MMIOs above 2K : special operations with side effects */ { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, |