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| author | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:39 +0100 |
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| committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:39 +0100 |
| commit | 707ea7ab4d55e0d907f72280eb2e4d376efeddf7 (patch) | |
| tree | 8d94dcbcd1ed3a2a4f3630b308e3218130d6c72c /hw/intc/xive2.c | |
| parent | 34b0696be443e123d2d5225613c4604c66eb7a64 (diff) | |
| download | focaccia-qemu-707ea7ab4d55e0d907f72280eb2e4d376efeddf7.tar.gz focaccia-qemu-707ea7ab4d55e0d907f72280eb2e4d376efeddf7.zip | |
pnv/xive2: Introduce new capability bits
These bits control the availability of interrupt features : StoreEOI, PHB PQ_disable, PHB Address-Based Trigger and the overall XIVE exploitation mode. These bits can be set at early boot time of the system to activate/deactivate a feature for testing purposes. The default value should be '1'. The 'XIVE exploitation mode' bit is a software bit that skiboot could use to disable the XIVE OS interface and propose a P8 style XICS interface instead. There are no plans for that for the moment. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/intc/xive2.c')
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