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| author | Nicholas Piggin <npiggin@gmail.com> | 2025-05-12 13:10:48 +1000 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-07-21 08:03:53 +0200 |
| commit | 203181cebdb96283520b496d6eaa49634eb51579 (patch) | |
| tree | ab58ba4748971a7ac9d13d22439851dc4508d819 /hw/intc | |
| parent | 370ea4a4b6fffc30324fc8f8134483e5a749114d (diff) | |
| download | focaccia-qemu-203181cebdb96283520b496d6eaa49634eb51579.tar.gz focaccia-qemu-203181cebdb96283520b496d6eaa49634eb51579.zip | |
ppc/xive: Assert group interrupts were redistributed
Add some assertions to try to ensure presented group interrupts do not get lost without being redistributed, if they become precluded by CPPR or preempted by a higher priority interrupt. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Michael Kowal <kowal@linux.ibm.com> Tested-by: Gautam Menghani <gautam@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-40-npiggin@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/xive.c | 2 | ||||
| -rw-r--r-- | hw/intc/xive2.c | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 6ad84f93c7..d609d552e8 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -132,6 +132,8 @@ void xive_tctx_pipr_set(XiveTCTX *tctx, uint8_t ring, uint8_t pipr, uint8_t *sig_regs = xive_tctx_signal_regs(tctx, ring); uint8_t *regs = &tctx->regs[ring]; + g_assert(!xive_nsr_indicates_group_exception(ring, sig_regs[TM_NSR])); + sig_regs[TM_PIPR] = pipr; if (pipr < sig_regs[TM_CPPR]) { diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 531e6517ba..a0a6b1a881 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -1089,6 +1089,7 @@ static void xive2_tctx_process_pending(XiveTCTX *tctx, uint8_t sig_ring) int rc; g_assert(sig_ring == TM_QW3_HV_PHYS || sig_ring == TM_QW1_OS); + g_assert(!xive_nsr_indicates_group_exception(sig_ring, sig_regs[TM_NSR])); /* * Recompute the PIPR based on local pending interrupts. It will |