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| author | Aditya Gupta <adityag@linux.ibm.com> | 2025-09-25 23:00:44 +0530 |
|---|---|---|
| committer | Harsh Prateek Bora <harshpb@linux.ibm.com> | 2025-09-28 23:22:06 +0530 |
| commit | 849a6bb854b48d757fab5e408f6a17dff568ec13 (patch) | |
| tree | 184c37c9bf9169f055625261de3a24d785a6f7a1 /hw/intc | |
| parent | 73a911e966acd8314e39a4ce4bc58e2254e68324 (diff) | |
| download | focaccia-qemu-849a6bb854b48d757fab5e408f6a17dff568ec13.tar.gz focaccia-qemu-849a6bb854b48d757fab5e408f6a17dff568ec13.zip | |
ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller
Existing code in XIVE2 assumes the chip to be a Power10 Chip. Instead add a handler to get reference to the interrupt controller (XIVE) for a given Power Chip. Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Amit Machhiwal <amachhiw@linux.ibm.com> Tested-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Link: https://lore.kernel.org/r/20250925173049.891406-4-adityag@linux.ibm.com Message-ID: <20250925173049.891406-4-adityag@linux.ibm.com>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/pnv_xive2.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index e019cad5c1..0663baab54 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -110,8 +110,8 @@ static PnvXive2 *pnv_xive2_get_remote(uint32_t vsd_type, hwaddr fwd_addr) int i; for (i = 0; i < pnv->num_chips; i++) { - Pnv10Chip *chip10 = PNV10_CHIP(pnv->chips[i]); - PnvXive2 *xive = &chip10->xive; + PnvChipClass *k = PNV_CHIP_GET_CLASS(pnv->chips[i]); + PnvXive2 *xive = PNV_XIVE2(k->intc_get(pnv->chips[i])); /* * Is this the XIVE matching the forwarded VSD address is for this |