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| author | Bernhard Beschow <shentey@gmail.com> | 2023-05-19 10:47:33 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-05-19 10:30:46 -0400 |
| commit | f0bc6bf725428860b479cb771e99bb33a3f5847d (patch) | |
| tree | eace5e68847209ed95cbde054134f88b3e42dd60 /hw/isa | |
| parent | 547a652fd1e10c2b6a2b9b91084e4c1cea8665a2 (diff) | |
| download | focaccia-qemu-f0bc6bf725428860b479cb771e99bb33a3f5847d.tar.gz focaccia-qemu-f0bc6bf725428860b479cb771e99bb33a3f5847d.zip | |
hw/i386/pc: Create RTC controllers in south bridges
Just like in the real hardware (and in PIIX4), create the RTC controllers in the south bridges. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230519084734.220480-2-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/isa')
| -rw-r--r-- | hw/isa/Kconfig | 2 | ||||
| -rw-r--r-- | hw/isa/lpc_ich9.c | 8 | ||||
| -rw-r--r-- | hw/isa/piix3.c | 15 |
3 files changed, 25 insertions, 0 deletions
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 0156a66889..c10cbc5fc1 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -35,6 +35,7 @@ config PIIX3 bool select I8257 select ISA_BUS + select MC146818RTC config PIIX4 bool @@ -79,3 +80,4 @@ config LPC_ICH9 select I8257 select ISA_BUS select ACPI_ICH9 + select MC146818RTC diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 9714b0001e..9c47a2f6c7 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -658,6 +658,8 @@ static void ich9_lpc_initfn(Object *obj) static const uint8_t acpi_enable_cmd = ICH9_APM_ACPI_ENABLE; static const uint8_t acpi_disable_cmd = ICH9_APM_ACPI_DISABLE; + object_initialize_child(obj, "rtc", &lpc->rtc, TYPE_MC146818_RTC); + object_property_add_uint8_ptr(obj, ACPI_PM_PROP_SCI_INT, &lpc->sci_gsi, OBJ_PROP_FLAG_READ); object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD, @@ -723,6 +725,12 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp) i8257_dma_init(isa_bus, 0); + /* RTC */ + qdev_prop_set_int32(DEVICE(&lpc->rtc), "base_year", 2000); + if (!qdev_realize(DEVICE(&lpc->rtc), BUS(isa_bus), errp)) { + return; + } + pci_bus_irqs(pci_bus, ich9_lpc_set_irq, d, ICH9_LPC_NB_PIRQS); pci_bus_map_irqs(pci_bus, ich9_lpc_map_irq); pci_bus_set_route_irq_fn(pci_bus, ich9_route_intx_pin_to_irq); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index a9cb39bf21..f9103ea45a 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -28,6 +28,7 @@ #include "hw/dma/i8257.h" #include "hw/southbridge/piix.h" #include "hw/irq.h" +#include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "hw/xen/xen.h" #include "sysemu/runstate.h" @@ -301,6 +302,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) PIIX_RCR_IOPORT, &d->rcr_mem, 1); i8257_dma_init(isa_bus, 0); + + /* RTC */ + qdev_prop_set_int32(DEVICE(&d->rtc), "base_year", 2000); + if (!qdev_realize(DEVICE(&d->rtc), BUS(isa_bus), errp)) { + return; + } } static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) @@ -324,6 +331,13 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) qbus_build_aml(bus, scope); } +static void pci_piix3_init(Object *obj) +{ + PIIX3State *d = PIIX3_PCI_DEVICE(obj); + + object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); +} + static void pci_piix3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -350,6 +364,7 @@ static const TypeInfo piix3_pci_type_info = { .name = TYPE_PIIX3_PCI_DEVICE, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX3State), + .instance_init = pci_piix3_init, .abstract = true, .class_init = pci_piix3_class_init, .interfaces = (InterfaceInfo[]) { |