diff options
| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-08-24 09:17:05 -0400 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-08-24 09:17:05 -0400 |
| commit | 6030ef9d416d740eed9c0beaf7eef83d27eaf4eb (patch) | |
| tree | 18bb2d7fc4bf79934885d8dad843c1164ed80504 /hw/loongarch/virt.c | |
| parent | 92e1d39f989771f9fc190234111863c7376487c5 (diff) | |
| parent | 3f6bec4a9f7c159d32d49f6df5c2c3d587b953b9 (diff) | |
| download | focaccia-qemu-6030ef9d416d740eed9c0beaf7eef83d27eaf4eb.tar.gz focaccia-qemu-6030ef9d416d740eed9c0beaf7eef83d27eaf4eb.zip | |
Merge tag 'pull-loongarch-20230824' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20230824 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZOcdAwAKCRBAov/yOSY+ # 3w3CA/sH8+Ay+Qnaqa2vEyuhOlFQuxHKeR7mYfsitAdzh8yMK2K8C2iBUzDzL1H3 # kZmZbCcYX7ko9RLhsuXmvfBJ7iwzY55ozSHLIjJ/VS4JVE5B0cUSZ5jjIPDqpzDs # 7TUt9qpTkwg0e+klzVREWLSWP5xopvkRvFHZM3KZZhGMphOTUQ== # =/HHZ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Aug 2023 05:04:03 EDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20230824' of https://gitlab.com/gaosong/qemu: (31 commits) hw/loongarch: Fix ACPI processor id off-by-one error target/loongarch: Split fcc register to fcc0-7 in gdbstub hw/intc/loongarch_pch: fix edge triggered irq handling target/loongarch: cpu: Implement get_arch_id callback target/loongarch: Add avail_IOCSR to check iocsr instructions target/loongarch: Add avail_LSX to check LSX instructions target/loongarch: Add avail_LAM to check atomic instructions target/loongarch: Add avail_LSPW to check LSPW instructions target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions hw/loongarch: Remove restriction of la464 cores in the virt machine target/loongarch: Add LoongArch32 cpu la132 target/loongarch: Add avail_64 to check la64-only instructions target/loongarch: Add a check parameter to the TRANS macro target/loongarch: Sign extend results in VA32 mode target/loongarch: Truncate high 32 bits of address in VA32 mode target/loongarch: Extract set_pc() helper target/loongarch: Extract make_address_pc() helper target/loongarch: Extract make_address_i() helper target/loongarch: Extract make_address_x() helper target/loongarch: Add LA64 & VA32 to DisasContext ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/loongarch/virt.c')
| -rw-r--r-- | hw/loongarch/virt.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index e19b042ce8..2629128aed 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -798,11 +798,6 @@ static void loongarch_init(MachineState *machine) cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); } - if (!strstr(cpu_model, "la464")) { - error_report("LoongArch/TCG needs cpu type la464"); - exit(1); - } - if (ram_size < 1 * GiB) { error_report("ram_size must be greater than 1G."); exit(1); @@ -815,6 +810,8 @@ static void loongarch_init(MachineState *machine) cpu = cpu_create(machine->cpu_type); cpu->cpu_index = i; machine->possible_cpus->cpus[i].cpu = OBJECT(cpu); + lacpu = LOONGARCH_CPU(cpu); + lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id; } fdt_add_cpu_nodes(lams); |