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authorAndreas Färber <afaerber@suse.de>2013-01-17 22:30:20 +0100
committerAndreas Färber <afaerber@suse.de>2013-03-12 10:35:55 +0100
commitd8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (patch)
tree57f8deccddd53e7aab5ca75d1d194da635a35790 /hw/microblaze/pic_cpu.c
parent259186a7d2f7184efc96ae99bc5658e6159f53ad (diff)
downloadfocaccia-qemu-d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5.tar.gz
focaccia-qemu-d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5.zip
exec: Pass CPUState to cpu_reset_interrupt()
Move it to qom/cpu.c to avoid build failures depending on include order
of cpu-qom.h and exec/cpu-all.h.

Change opaques of various ..._irq_handler() functions to the
appropriate CPU type to facilitate using cpu_reset_interrupt().

Fix Coding Style issues while at it (missing braces, indentation).

Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/microblaze/pic_cpu.c')
-rw-r--r--hw/microblaze/pic_cpu.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/hw/microblaze/pic_cpu.c b/hw/microblaze/pic_cpu.c
index d4743ab390..47568505c7 100644
--- a/hw/microblaze/pic_cpu.c
+++ b/hw/microblaze/pic_cpu.c
@@ -29,16 +29,20 @@
 
 static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
 {
-    CPUMBState *env = (CPUMBState *)opaque;
+    MicroBlazeCPU *cpu = opaque;
+    CPUMBState *env = &cpu->env;
+    CPUState *cs = CPU(cpu);
     int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
 
-    if (level)
+    if (level) {
         cpu_interrupt(env, type);
-    else
-        cpu_reset_interrupt(env, type);
+    } else {
+        cpu_reset_interrupt(cs, type);
+    }
 }
 
 qemu_irq *microblaze_pic_init_cpu(CPUMBState *env)
 {
-    return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
+    return qemu_allocate_irqs(microblaze_pic_cpu_handler, mb_env_get_cpu(env),
+                              2);
 }