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| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
| commit | aea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch) | |
| tree | dd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /hw/mips_int.c | |
| parent | 9e4dd565b46749d5e6d5cf87bfd84f1917c68319 (diff) | |
| parent | dd83b06ae61cfa2dc4381ab49f365bd0995fc930 (diff) | |
| download | focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.gz focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.zip | |
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits) qom: Introduce CPU class Rename CPUState -> CPUArchState xtensa hw/: Don't use CPUState sparc hw/: Don't use CPUState sh4 hw/: Don't use CPUState s390x hw/: Don't use CPUState ppc hw/: Don't use CPUState mips hw/: Don't use CPUState microblaze hw/: Don't use CPUState m68k hw/: Don't use CPUState lm32 hw/: Don't use CPUState i386 hw/: Don't use CPUState cris hw/: Don't use CPUState arm hw/: Don't use CPUState alpha hw/: Don't use CPUState xtensa-semi: Don't use CPUState m68k-semi: Don't use CPUState arm-semi: Don't use CPUState target-xtensa: Don't overuse CPUState target-unicore32: Don't overuse CPUState ...
Diffstat (limited to 'hw/mips_int.c')
| -rw-r--r-- | hw/mips_int.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/mips_int.c b/hw/mips_int.c index 477f6abf95..6423fd0bd9 100644 --- a/hw/mips_int.c +++ b/hw/mips_int.c @@ -26,7 +26,7 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) { - CPUState *env = (CPUState *)opaque; + CPUMIPSState *env = (CPUMIPSState *)opaque; if (irq < 0 || irq > 7) return; @@ -44,7 +44,7 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) } } -void cpu_mips_irq_init_cpu(CPUState *env) +void cpu_mips_irq_init_cpu(CPUMIPSState *env) { qemu_irq *qi; int i; @@ -55,7 +55,7 @@ void cpu_mips_irq_init_cpu(CPUState *env) } } -void cpu_mips_soft_irq(CPUState *env, int irq, int level) +void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level) { if (irq < 0 || irq > 2) { return; |