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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2024-06-04 13:44:30 +0800 |
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| committer | Cédric Le Goater <clg@redhat.com> | 2024-06-16 21:08:54 +0200 |
| commit | 0559e60669bae9c047cd5cf6f9be38ea7ced39b2 (patch) | |
| tree | 5e509288283e6b6f46548b4cd9ac3806560aa42e /hw/misc/aspeed_scu.c | |
| parent | 6330be8da44cf11e429197187e814299eff881cd (diff) | |
| download | focaccia-qemu-0559e60669bae9c047cd5cf6f9be38ea7ced39b2.tar.gz focaccia-qemu-0559e60669bae9c047cd5cf6f9be38ea7ced39b2.zip | |
aspeed/smc: support different memory region ops for SMC flash region
It set "aspeed_smc_flash_ops" struct which containing read and write callbacks to be used when I/O is performed on the SMC flash region. And it set the valid max_access_size 4 by default for all ASPEED SMC models. However, the valid max_access_size 4 only support 32 bits CPUs. To support all ASPEED SMC model, introduce a new "const MemoryRegionOps *" attribute in AspeedSMCClass and use it in aspeed_smc_flash_realize function. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/misc/aspeed_scu.c')
0 files changed, 0 insertions, 0 deletions