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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-03-04 11:46:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-03-04 11:46:32 +0000 |
| commit | 3c0f12df65da872d5fbccae469f2cb21ed1c03b7 (patch) | |
| tree | da8e1ea0ee497fea96ed2bf52ef5ca93285bc9f4 /hw/misc/bcm2835_mbox.c | |
| parent | 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc (diff) | |
| parent | ba63cf47a93041137a94e86b7d0cd87fc896949b (diff) | |
| download | focaccia-qemu-3c0f12df65da872d5fbccae469f2cb21ed1c03b7.tar.gz focaccia-qemu-3c0f12df65da872d5fbccae469f2cb21ed1c03b7.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160304' into staging
target-arm queue: * Correct handling of writes to CPSR from gdbstub in user mode * virt: lift maximum RAM limit to 255GB * sdhci: implement reset * virt: if booting in Secure mode, provide secure-only RAM, make first flash device secure-only, and assume the EL3 boot rom will handle PSCI * bcm2835: use explicit endianness accessors rather than ldl/stl_phys * support big-endian in system mode for ARM * implement SETEND instruction * arm_gic: implement the GICv2 GICC_DIR register * fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon # gpg: Signature made Fri 04 Mar 2016 11:38:53 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20160304: (30 commits) target-arm: Only trap SRS from S-EL1 if specified mode is MON hw/intc/arm_gic.c: Implement GICv2 GICC_DIR arm: boot: Support big-endian elfs loader: Add data swap option to load-elf loader: load_elf(): Add doc comment loader: add API to load elf header target-arm: implement BE32 mode in system emulation target-arm: implement setend target-arm: introduce tbflag for endianness target-arm: a64: Add endianness support target-arm: introduce disas flag for endianness target-arm: pass DisasContext to gen_aa32_ld*/st* target-arm: implement SCTLR.EE linux-user: arm: handle CPSR.E correctly in strex emulation linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode arm: cpu: handle BE32 user-mode as BE target-arm: cpu: Move cpu_is_big_endian to header target-arm: implement SCTLR.B, drop bswap_code linux-user: arm: pass env to get_user_code_* linux-user: arm: fix coding style for some linux-user signal functions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/bcm2835_mbox.c')
| -rw-r--r-- | hw/misc/bcm2835_mbox.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c index 500baba7c0..106585a7bf 100644 --- a/hw/misc/bcm2835_mbox.c +++ b/hw/misc/bcm2835_mbox.c @@ -98,7 +98,7 @@ static void bcm2835_mbox_update(BCM2835MboxState *s) */ for (n = 0; n < MBOX_CHAN_COUNT; n++) { while (s->available[n] && !(s->mbox[0].status & ARM_MS_FULL)) { - value = ldl_phys(&s->mbox_as, n << MBOX_AS_CHAN_SHIFT); + value = ldl_le_phys(&s->mbox_as, n << MBOX_AS_CHAN_SHIFT); assert(value != MBOX_INVALID_DATA); /* Pending interrupt but no data */ mbox_push(&s->mbox[0], value); } @@ -207,12 +207,12 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset, ch = value & 0xf; if (ch < MBOX_CHAN_COUNT) { childaddr = ch << MBOX_AS_CHAN_SHIFT; - if (ldl_phys(&s->mbox_as, childaddr + MBOX_AS_PENDING)) { + if (ldl_le_phys(&s->mbox_as, childaddr + MBOX_AS_PENDING)) { /* Child busy, push delayed. Push it in the arm->vc mbox */ mbox_push(&s->mbox[1], value); } else { /* Push it directly to the child device */ - stl_phys(&s->mbox_as, childaddr, value); + stl_le_phys(&s->mbox_as, childaddr, value); } } else { /* Invalid channel number */ |