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authorBin Meng <bin.meng@windriver.com>2020-09-01 09:39:07 +0800
committerAlistair Francis <alistair.francis@wdc.com>2020-09-09 15:54:18 -0700
commitdfc388797cc413072e58a8f9a831633f29212448 (patch)
tree5f724d555e92eacfda103e7eefd48265a73bb0b7 /hw/misc/sifive_u_prci.c
parent64ac13633fd416541ea00ff4ae973489bdc33f7a (diff)
downloadfocaccia-qemu-dfc388797cc413072e58a8f9a831633f29212448.tar.gz
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hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
When cadence_gem model was created for Xilinx boards, the PHY address
was hard-coded to 23 in the GEM model. Now that we have introduced a
property we can use that to tell GEM model what our PHY address is.
Change all boards' GEM 'phy-addr' property value to 23, and set the
PHY address default value to 0 in the GEM model.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-13-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/misc/sifive_u_prci.c')
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