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authorRichard Henderson <richard.henderson@linaro.org>2025-03-28 12:55:24 -0500
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2025-03-31 21:32:43 +0200
commitfca2817fdcb00e65020c2dcfcb0b23b2a20ea3c4 (patch)
tree534c1788a5de453e84ff6d1e660e64b20665b756 /hw/misc/stm32l4x5_rcc.c
parent8001d22b0c67b2fbf8f2cb7b2f44bd7b46b360c1 (diff)
downloadfocaccia-qemu-fca2817fdcb00e65020c2dcfcb0b23b2a20ea3c4.tar.gz
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target/mips: Revert TARGET_PAGE_BITS_VARY
Revert ee3863b9d41 and a08d60bc6c2b.  The logic behind changing
the system page size because of what the Loongson kernel "prefers"
is flawed.

In the Loongson-2E manual, section 5.5, it is clear that the cpu
supports a 4k page size (along with many others).  Similarly for
the Loongson-3 series CPUs, the 4k page size is mentioned in the
section 7.7 (PageMask Register).  Therefore we must continue to
support a 4k page size.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250328175526.368121-2-richard.henderson@linaro.org>
[PMD: Mention Loongson-3 series CPUs]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'hw/misc/stm32l4x5_rcc.c')
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