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| author | Kane-Chen-AS <kane_chen@aspeedtech.com> | 2025-08-12 17:40:03 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-09-29 18:00:20 +0200 |
| commit | fdad6ec30dfb87df0980887a4c22e55ccf65f9c3 (patch) | |
| tree | ac42c5ad8dca11a9c704e9b54a4fffb93b2dbc3e /hw/misc | |
| parent | 8970c95c4db99dd44ff463acc14c69510776cdee (diff) | |
| download | focaccia-qemu-fdad6ec30dfb87df0980887a4c22e55ccf65f9c3.tar.gz focaccia-qemu-fdad6ec30dfb87df0980887a4c22e55ccf65f9c3.zip | |
hw/arm: Integrate ASPEED OTP memory support into AST1030 SoCs
The has_otp attribute is enabled in the SBC subclasses for AST1030 to control the presence of OTP support per SoC type. Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250812094011.2617526-7-kane_chen@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/misc')
| -rw-r--r-- | hw/misc/aspeed_sbc.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c index b56a8b7678..052c70fd42 100644 --- a/hw/misc/aspeed_sbc.c +++ b/hw/misc/aspeed_sbc.c @@ -285,9 +285,25 @@ static const TypeInfo aspeed_ast2600_sbc_info = { .class_init = aspeed_ast2600_sbc_class_init, }; +static void aspeed_ast10x0_sbc_class_init(ObjectClass *klass, const void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + AspeedSBCClass *sc = ASPEED_SBC_CLASS(klass); + + dc->desc = "AST10X0 Secure Boot Controller"; + sc->has_otp = true; +} + +static const TypeInfo aspeed_ast10x0_sbc_info = { + .name = TYPE_ASPEED_AST10X0_SBC, + .parent = TYPE_ASPEED_SBC, + .class_init = aspeed_ast10x0_sbc_class_init, +}; + static void aspeed_sbc_register_types(void) { type_register_static(&aspeed_ast2600_sbc_info); + type_register_static(&aspeed_ast10x0_sbc_info); type_register_static(&aspeed_sbc_info); } |