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| author | Doug Brown <doug@schmorgal.com> | 2024-09-13 15:31:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-09-13 15:31:48 +0100 |
| commit | be243e9ddb8f0ba149a1c51faee035c303be7eeb (patch) | |
| tree | 50da5a3e5fb2653baedb05d042d63cf5e244b14f /hw/net | |
| parent | 7f34aae641ce1a2654c1a950aec4eab6f371a55d (diff) | |
| download | focaccia-qemu-be243e9ddb8f0ba149a1c51faee035c303be7eeb.tar.gz focaccia-qemu-be243e9ddb8f0ba149a1c51faee035c303be7eeb.zip | |
hw/net/can/xlnx-versal-canfd: Fix byte ordering
The endianness of the CAN data was backwards in each group of 4 bytes. For example, the following data: 00 11 22 33 44 55 66 77 was showing up like this: 33 22 11 00 77 66 55 44 Fix both the TX and RX code to put the data in the correct order. Signed-off-by: Doug Brown <doug@schmorgal.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-id: 20240827034927.66659-6-doug@schmorgal.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/net')
| -rw-r--r-- | hw/net/can/xlnx-versal-canfd.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c index 9fba5b9dfc..bcfffee1cc 100644 --- a/hw/net/can/xlnx-versal-canfd.c +++ b/hw/net/can/xlnx-versal-canfd.c @@ -951,7 +951,7 @@ static void regs2frame(XlnxVersalCANFDState *s, qemu_can_frame *frame, } for (j = 0; j < frame->can_dlc; j++) { - val = 8 * i; + val = 8 * (3 - i); frame->data[j] = extract32(s->regs[reg_num + 2 + (j / 4)], val, 8); i++; @@ -1093,19 +1093,19 @@ static void store_rx_sequential(XlnxVersalCANFDState *s, case 0: rx_reg_num = i / 4; - data_reg_val = FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES3, + data_reg_val = FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES0, frame->data[i]); break; case 1: - data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES2, + data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES1, frame->data[i]); break; case 2: - data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES1, + data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES2, frame->data[i]); break; case 3: - data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES0, + data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES3, frame->data[i]); /* * Last Bytes data which means we have all 4 bytes ready to |