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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-29 19:14:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-29 19:14:48 +0100 |
| commit | 1ec20c2a3aa5b90522d15fccf7f052a90f70ddaa (patch) | |
| tree | ec9dc5923851bb31ea6ba07f351b9e9d458e7ef0 /hw/pci-host/q35.c | |
| parent | ef8757f1fe8095a256ee617e4dbac69d3b33ae94 (diff) | |
| parent | 74b6ce43e3aacbb101018407196fc963e2c39fea (diff) | |
| download | focaccia-qemu-1ec20c2a3aa5b90522d15fccf7f052a90f70ddaa.tar.gz focaccia-qemu-1ec20c2a3aa5b90522d15fccf7f052a90f70ddaa.zip | |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* serial port fixes (Paolo) * Q35 modeling improvements (Paolo, Vasily) * chardev cleanup improvements (Marc-André) * iscsi bugfix (Peter L.) * cpu_exec patch from multi-arch patches (Peter C.) * pci-assign tweak (Lin Ma) # gpg: Signature made Wed 29 Jun 2016 15:56:30 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (35 commits) socket: unlink unix socket on remove socket: add listen feature char: clean up remaining chardevs when leaving vhost-user: disable chardev handlers on close vhost-user-test: fix g_cond_wait_until compat implementation vl: smp_parse: fix regression ich9: implement SCI_IRQ_SEL register ich9: implement ACPI_EN register serial: reinstate watch after migration serial: remove watch on reset char: change qemu_chr_fe_add_watch to return unsigned serial: separate serial_xmit and serial_watch_cb serial: simplify tsr_retry reset serial: make tsr_retry unsigned iscsi: fix assertion in is_sector_request_lun_aligned target-*: Don't redefine cpu_exec() pci-assign: Move "Invalid ROM" error message to pci-assign-load-rom.c vnc: generalize "VNC server running on ..." message scsi: esp: fix migration MC146818 RTC: add GPIO access to output IRQ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host/q35.c')
| -rw-r--r-- | hw/pci-host/q35.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 70f897e3a9..03be05dc0d 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -127,6 +127,10 @@ static Property mch_props[] = { DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, Q35PCIHost, mch.pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE), DEFINE_PROP_UINT32("short_root_bus", Q35PCIHost, mch.short_root_bus, 0), + DEFINE_PROP_SIZE(PCI_HOST_BELOW_4G_MEM_SIZE, Q35PCIHost, + mch.below_4g_mem_size, 0), + DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, Q35PCIHost, + mch.above_4g_mem_size, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -177,6 +181,22 @@ static void q35_host_initfn(Object *obj) q35_host_get_mmcfg_size, NULL, NULL, NULL, NULL); + object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->mch.ram_memory, + qdev_prop_allow_set_link_before_realize, 0, NULL); + + object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, + (Object **) &s->mch.pci_address_space, + qdev_prop_allow_set_link_before_realize, 0, NULL); + + object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->mch.system_memory, + qdev_prop_allow_set_link_before_realize, 0, NULL); + + object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, + (Object **) &s->mch.address_space_io, + qdev_prop_allow_set_link_before_realize, 0, NULL); + /* Leave enough space for the biggest MCFG BAR */ /* TODO: this matches current bios behaviour, but * it's not a power of two, which means an MTRR |