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| author | Isaku Yamahata <yamahata@valinux.co.jp> | 2010-11-26 21:01:41 +0900 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2010-12-09 12:47:48 +0200 |
| commit | b1aeb92666d2fde413c34578b3b42bbfe5f2a506 (patch) | |
| tree | f29a9326008c68ca7c1a762f7f3f6e97832bef7e /hw/pci.c | |
| parent | 783e7706937fe15523b609b545587a028a2bdd03 (diff) | |
| download | focaccia-qemu-b1aeb92666d2fde413c34578b3b42bbfe5f2a506.tar.gz focaccia-qemu-b1aeb92666d2fde413c34578b3b42bbfe5f2a506.zip | |
pci: make command SERR bit writable
pcie aer needs SERR bit to be writable, and the PCI spec requires this as well. For compatibility, introduce compat global property command_serr_enable and make this bit readonly for a pre 0.14 pc machine. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci.c')
| -rw-r--r-- | hw/pci.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/pci.c b/hw/pci.c index 0c15b13037..ca878e88cb 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -57,6 +57,8 @@ struct BusInfo pci_bus_info = { DEFINE_PROP_UINT32("rombar", PCIDevice, rom_bar, 1), DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present, QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false), + DEFINE_PROP_BIT("command_serr_enable", PCIDevice, cap_present, + QEMU_PCI_CAP_SERR_BITNR, true), DEFINE_PROP_END_OF_LIST() } }; @@ -568,6 +570,9 @@ static void pci_init_wmask(PCIDevice *dev) pci_set_word(dev->wmask + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INTX_DISABLE); + if (dev->cap_present & QEMU_PCI_CAP_SERR) { + pci_word_test_and_set_mask(dev->wmask + PCI_COMMAND, PCI_COMMAND_SERR); + } memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff, config_size - PCI_CONFIG_HEADER_SIZE); |