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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-11-29 16:43:04 +0100 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-12-20 11:22:47 +1000 |
| commit | d2ed9fffba07a7ce87f33d5b9662e3e8eadb11d4 (patch) | |
| tree | 96bf9699bf043e3b26b038a884188611b539f10a /hw/riscv/microchip_pfsoc.c | |
| parent | be0a70b93f4ff3dda77b9db50ec452f03170ff9a (diff) | |
| download | focaccia-qemu-d2ed9fffba07a7ce87f33d5b9662e3e8eadb11d4.tar.gz focaccia-qemu-d2ed9fffba07a7ce87f33d5b9662e3e8eadb11d4.zip | |
hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses
Looking at htif_mm_ops[] read/write handlers, we notice they expect 32-bit values to accumulate into to the 'fromhost' and 'tohost' 64-bit variables. Explicit by setting the .impl min/max fields. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20241129154304.34946-4-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/microchip_pfsoc.c')
0 files changed, 0 insertions, 0 deletions