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| author | Jason Chien <jason.chien@sifive.com> | 2025-03-02 01:37:51 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-19 16:35:58 +1000 |
| commit | 3ea8fb521d6161a64879b6f43fac46b4d80d2e39 (patch) | |
| tree | e34b2e7b2ca4da5a8388c4e999001a19ab456f80 /hw/riscv/riscv-iommu.c | |
| parent | d2c5759c8dd4c00195d4ebecc7d009e41df6baef (diff) | |
| download | focaccia-qemu-3ea8fb521d6161a64879b6f43fac46b4d80d2e39.tar.gz focaccia-qemu-3ea8fb521d6161a64879b6f43fac46b4d80d2e39.zip | |
hw/riscv/riscv-iommu: Fix process directory table walk
The PPN field in a non-leaf PDT entry is positioned differently from that in a leaf PDT entry. The original implementation incorrectly used the leaf entry's PPN mask to extract the PPN from a non-leaf entry, leading to an erroneous page table walk. This commit introduces new macros to properly define the fields for non-leaf PDT entries and corrects the page table walk. Signed-off-by: Jason Chien <jason.chien@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250301173751.9446-1-jason.chien@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/riscv-iommu.c')
| -rw-r--r-- | hw/riscv/riscv-iommu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index d46beb2d64..76e0fcd873 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -1042,10 +1042,10 @@ static int riscv_iommu_ctx_fetch(RISCVIOMMUState *s, RISCVIOMMUContext *ctx) return RISCV_IOMMU_FQ_CAUSE_PDT_LOAD_FAULT; } le64_to_cpus(&de); - if (!(de & RISCV_IOMMU_PC_TA_V)) { + if (!(de & RISCV_IOMMU_PDTE_VALID)) { return RISCV_IOMMU_FQ_CAUSE_PDT_INVALID; } - addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PC_FSC_PPN)); + addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PDTE_PPN)); } riscv_iommu_hpm_incr_ctr(s, ctx, RISCV_IOMMU_HPMEVENT_PD_WALK); |