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| author | Tomasz Jeznach <tjeznach@rivosinc.com> | 2025-02-24 16:08:18 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | 4faea7e084dc02c6491b55e594ba5d39a75ff38f (patch) | |
| tree | 06e0b4cf4170304942c008f988fe6aa223f025ab /hw/riscv/riscv-iommu.h | |
| parent | 045b19afc9889aa001bab3ae2cb1ecc47b8de790 (diff) | |
| download | focaccia-qemu-4faea7e084dc02c6491b55e594ba5d39a75ff38f.tar.gz focaccia-qemu-4faea7e084dc02c6491b55e594ba5d39a75ff38f.zip | |
hw/riscv/riscv-iommu: add riscv-iommu-hpm file
The HPM (Hardware Performance Monitor) support consists of almost 7 hundred lines that would be put on top of the base riscv-iommu emulation. To avoid clogging riscv-iommu.c, add a separated riscv-iommu-hpm file that will contain HPM specific code. We'll start by adding riscv_iommu_hpmcycle_read(), a helper that will be called during the riscv_iommu_mmio_read() callback. This change will have no effect on the existing emulation since we're not declaring HPM feature support. Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250224190826.1858473-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/riscv-iommu.h')
| -rw-r--r-- | hw/riscv/riscv-iommu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/riscv/riscv-iommu.h b/hw/riscv/riscv-iommu.h index d2608d2f9b..59db3fd02a 100644 --- a/hw/riscv/riscv-iommu.h +++ b/hw/riscv/riscv-iommu.h @@ -81,6 +81,10 @@ struct RISCVIOMMUState { QLIST_ENTRY(RISCVIOMMUState) iommus; QLIST_HEAD(, RISCVIOMMUSpace) spaces; + + /* HPM cycle counter */ + uint64_t hpmcycle_val; /* Current value of cycle register */ + uint64_t hpmcycle_prev; /* Saved value of QEMU_CLOCK_VIRTUAL clock */ }; void riscv_iommu_pci_setup_iommu(RISCVIOMMUState *iommu, PCIBus *bus, |