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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2025-07-11 21:46:30 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-07-15 00:25:00 +0200 |
| commit | 1fa3812ee884dba8dbbd9d2f121b10c67469cae3 (patch) | |
| tree | e026ddae7dbfeac83c6c0ab3d62db3bd22872c1a /hw/scsi | |
| parent | 07e8cd2b8c757d646178879169df79fbf0a09eda (diff) | |
| download | focaccia-qemu-1fa3812ee884dba8dbbd9d2f121b10c67469cae3.tar.gz focaccia-qemu-1fa3812ee884dba8dbbd9d2f121b10c67469cae3.zip | |
esp.c: only raise IRQ in esp_transfer_data() for CMD_SEL, CMD_SELATN and CMD_TI commands
Clarify the logic in esp_transfer_data() to ensure that the deferred interrupt code can only be triggered for CMD_SEL, CMD_SELATN and CMD_TI commands. This should already be the case, but make it explicit to ensure the logic isn't triggered unexpectedly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250711204636.542964-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'hw/scsi')
| -rw-r--r-- | hw/scsi/esp.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index f24991fd16..9181c8810f 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -1012,6 +1012,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len) */ s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; s->rregs[ESP_RSEQ] = SEQ_CD; + esp_raise_irq(s); break; case CMD_SELATNS | CMD_DMA: @@ -1022,6 +1023,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len) */ s->rregs[ESP_RINTR] |= INTR_BS; s->rregs[ESP_RSEQ] = SEQ_MO; + esp_raise_irq(s); break; case CMD_TI | CMD_DMA: @@ -1032,10 +1034,9 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len) */ s->rregs[ESP_CMD] = 0; s->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(s); break; } - - esp_raise_irq(s); } /* |