diff options
| author | Blue Swirl <blauwirbel@gmail.com> | 2009-10-24 19:35:32 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2009-10-24 19:35:32 +0000 |
| commit | 49ef6c905598ebe240ccff7ab7f99fd73eee7d48 (patch) | |
| tree | a52c667da0467bd97b9e2c43eee27847f271303e /hw/sparc32_dma.c | |
| parent | 285e468d649e5349e066c7a387a6956f2571e1ea (diff) | |
| download | focaccia-qemu-49ef6c905598ebe240ccff7ab7f99fd73eee7d48.tar.gz focaccia-qemu-49ef6c905598ebe240ccff7ab7f99fd73eee7d48.zip | |
sparc32: convert DMA controller to reset + vmsd, fix reset on init
Add a missing call to reset on device init. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/sparc32_dma.c')
| -rw-r--r-- | hw/sparc32_dma.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c index aca37706f1..ff2faf9638 100644 --- a/hw/sparc32_dma.c +++ b/hw/sparc32_dma.c @@ -214,9 +214,9 @@ static CPUWriteMemoryFunc * const dma_mem_write[3] = { dma_mem_writel, }; -static void dma_reset(void *opaque) +static void dma_reset(DeviceState *d) { - DMAState *s = opaque; + DMAState *s = container_of(d, DMAState, busdev.qdev); memset(s->dmaregs, 0, DMA_SIZE); s->dmaregs[0] = DMA_VER; @@ -243,11 +243,10 @@ static int sparc32_dma_init1(SysBusDevice *dev) dma_io_memory = cpu_register_io_memory(dma_mem_read, dma_mem_write, s); sysbus_init_mmio(dev, DMA_SIZE, dma_io_memory); - vmstate_register(-1, &vmstate_dma, s); - qemu_register_reset(dma_reset, s); - qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1); qdev_init_gpio_out(&dev->qdev, &s->dev_reset, 1); + dma_reset(&s->busdev.qdev); + return 0; } @@ -255,6 +254,8 @@ static SysBusDeviceInfo sparc32_dma_info = { .init = sparc32_dma_init1, .qdev.name = "sparc32_dma", .qdev.size = sizeof(DMAState), + .qdev.vmsd = &vmstate_dma, + .qdev.reset = dma_reset, .qdev.props = (Property[]) { DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu), DEFINE_PROP_END_OF_LIST(), |