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authorPeter Maydell <peter.maydell@linaro.org>2023-09-21 19:54:45 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-10-19 14:32:13 +0100
commit3d80bbf1f619ad1a0db85bb385ce4f5f74e4b0a3 (patch)
treef5810614b5970cea016926b91fafb3b5e591478f /hw/timer/npcm7xx_timer.c
parent4cdd146d8bb72117b10ff22afe3a730dc4df4913 (diff)
downloadfocaccia-qemu-3d80bbf1f619ad1a0db85bb385ce4f5f74e4b0a3.tar.gz
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target/arm: Implement FEAT_HPMN0
FEAT_HPMN0 is a small feature which defines that it is valid for
MDCR_EL2.HPMN to be set to 0, meaning "no PMU event counters provided
to an EL1 guest" (previously this setting was reserved). QEMU's
implementation almost gets HPMN == 0 right, but we need to fix
one check in pmevcntr_is_64_bit(). That is enough for us to
advertise the feature in the 'max' CPU.

(We don't need to make the behaviour conditional on feature
presence, because the FEAT_HPMN0 behaviour is within the range
of permitted UNPREDICTABLE behaviour for a non-FEAT_HPMN0
implementation.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230921185445.3339214-1-peter.maydell@linaro.org
Diffstat (limited to 'hw/timer/npcm7xx_timer.c')
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