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| author | Avi Kivity <avi@redhat.com> | 2012-10-23 12:30:10 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-10-23 08:58:25 -0500 |
| commit | a8170e5e97ad17ca169c64ba87ae2f53850dab4c (patch) | |
| tree | 51182ed444f0d2bf282f6bdacef43f32e5adaadf /hw/tusb6010.c | |
| parent | 50d2b4d93f45a425f15ac88bc4ec352f5c6e0bc2 (diff) | |
| download | focaccia-qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.gz focaccia-qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.zip | |
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,
standards conformant hwaddr.
Outstanding patchsets can be fixed up with the command
git rebase -i --exec 'find -name "*.[ch]"
| xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/tusb6010.c')
| -rw-r--r-- | hw/tusb6010.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/tusb6010.c b/hw/tusb6010.c index 5ba8da6d6a..325200bd34 100644 --- a/hw/tusb6010.c +++ b/hw/tusb6010.c @@ -281,7 +281,7 @@ static void tusb_gpio_intr_update(TUSBState *s) extern CPUReadMemoryFunc * const musb_read[]; extern CPUWriteMemoryFunc * const musb_write[]; -static uint32_t tusb_async_readb(void *opaque, target_phys_addr_t addr) +static uint32_t tusb_async_readb(void *opaque, hwaddr addr) { TUSBState *s = (TUSBState *) opaque; @@ -298,7 +298,7 @@ static uint32_t tusb_async_readb(void *opaque, target_phys_addr_t addr) return 0; } -static uint32_t tusb_async_readh(void *opaque, target_phys_addr_t addr) +static uint32_t tusb_async_readh(void *opaque, hwaddr addr) { TUSBState *s = (TUSBState *) opaque; @@ -315,7 +315,7 @@ static uint32_t tusb_async_readh(void *opaque, target_phys_addr_t addr) return 0; } -static uint32_t tusb_async_readw(void *opaque, target_phys_addr_t addr) +static uint32_t tusb_async_readw(void *opaque, hwaddr addr) { TUSBState *s = (TUSBState *) opaque; int offset = addr & 0xfff; @@ -438,7 +438,7 @@ static uint32_t tusb_async_readw(void *opaque, target_phys_addr_t addr) return 0; } -static void tusb_async_writeb(void *opaque, target_phys_addr_t addr, +static void tusb_async_writeb(void *opaque, hwaddr addr, uint32_t value) { TUSBState *s = (TUSBState *) opaque; @@ -459,7 +459,7 @@ static void tusb_async_writeb(void *opaque, target_phys_addr_t addr, } } -static void tusb_async_writeh(void *opaque, target_phys_addr_t addr, +static void tusb_async_writeh(void *opaque, hwaddr addr, uint32_t value) { TUSBState *s = (TUSBState *) opaque; @@ -480,7 +480,7 @@ static void tusb_async_writeh(void *opaque, target_phys_addr_t addr, } } -static void tusb_async_writew(void *opaque, target_phys_addr_t addr, +static void tusb_async_writew(void *opaque, hwaddr addr, uint32_t value) { TUSBState *s = (TUSBState *) opaque; |